This invention relates to a method of manufacturing a semiconductor device and particularly to a method of semiconductor element isolation.
Heretofore, a technique of local oxidation of silicon (or so-called LOCOS technique) is well known in the art as element isolation technique. In the LOCOS technique, manufacturing processes are carried out as follows. An oxidization-resisting film, e.g., a silicon nitride (Si.sub.3 N.sub.4) film is formed over a semiconductor substrate interposing an insulation film. Then, the silicon nitride film is patterned and selective oxidization of the insulation film is performed using patterned silicon nitride film and as a result, a thick insulation film for element isolation is obtained.
By adopting the LOCOS technique, an error is produced between the size of the selective oxidization mask material (silicon nitride film) and the size of the formed element isolation region due to a phenomenon known as bird's beak, i.e., growth of the oxide film in the lateral direction. For example, if the thickness of the silicon nitride film is 2,500 .ANG., the thickness of the insulation film (i.e., silicon oxide film) between the semiconductor substrate (silicon substrate) and silicon nitride film is 1,500 .ANG., the thickness of the element isolation insulation film at the time of the selective oxidization is 8,000 .ANG.and the thickness of the finished element isolation film is 5,000 to 6,000 .ANG., the size error is 1.2 to 1.6 .mu.m.
Due to this size error, in the case of adopting the LOCOS technique, it is difficult to form the element isolation region having the width of the practical element isolation region less than approximately 20 .mu.m. Consequently, the LOCOS technique is not suited for the formation of an element isolation insulation film having a size in the transverse direction less than 2 .mu.m.
Further, in the LOCOS technique, an impurity is introduced by means of ion implantation in order to prevent conduction of parasitic transistor in the element isolation region. The impurity subsequently migrates into the active element transistor portion when the element isolation insulation film is formed (usually by thermal oxidization). That is, it leads to a narrow channel effect, thereby degrading the electrical characteristics of the element.
Further, with the LOCOS technique, the thickness of the element isolation insulation film is reduced when the gap size of the mask material for selective oxidization is reduced.
Concerning the problem of the size error noted above, this problem can be solved by setting the size of the selective oxidization mask material by preliminarily taking the size errors into considerations. In this case, however, the formation of the mask material becomes difficult. Besides, the manufacturing precision is deteriorated. Moreover, this process does not solve the problem of forming a fine element isolation insulation film.
Further, as a method for reducing the size error, it is thought to form a groove in the semiconductor substrate or remove or make extremely thin the insulation film of the lowermost layer in the LOCOS technique. These methods, however, have a problem that crystal defects are produced in the semiconductor substrate when the element isolation region is formed.
As shown above, the LOCOS technique, which has been used for forming the element isolation region, has the problems that an error is produced between the size of the mask material for selective oxidization and the size of the formed element isolation region, that a narrow channel effect is produced with the migration of the impurity and that the thickness of the element isolation region is reduced upon a reduction of the size of the region.